Below are some
common defects encountered in pattern transfer processes during wafer
Variations in the dimensions of the layer patterns, such as the
widths of the lines, may occur due to limitations in the photographic
process used or improper control of the exposure time. This defect
becomes critical when it is found in very long and narrow cuts, since
discontinuities may occur and result in problems such as open metal lines.
Dimensional variations can also be due to resist swelling during
Undercutting of the Resist.
Poor adhesion of the resist to the masking film can lead to undercutting
during the wet etching process, causing windows or features that are
larger in size than intended. Undercutting, or the unwanted exposure
and etching of a material beyond its defined limits, is a phenomenon
caused by the capillary action of the wet chemicals used for etching.
Larger windows caused by undercutting can cause adjacent metal lines to
the process of aligning two images or features on a pattern correctly.
Poor registration is caused by mask alignment error, and can result in
altered device configurations. Extreme cases that affect the active n- and
p- regions of the circuit can cause severe degradations in the device's
electrical characteristics or even result in electrical failure.
Pinholes are very small holes that, if present in the resist, can result
in undesired windows in the underlying layer to open. Needless to say, the
criticality of this problem becomes magnified as the packing density of
the components in the circuit increases.
The presence of dust particles in a clean room can lead to pattern
delineation issues. Dust particles that are opaque, such as carbon
or metallic particles, can cause holes in layers (negative resist) or
prevent windows from opening up (positive resist). Dust particles
that are transparent, on the other hand, can cause diffraction effects
that result in similar pattern delineation problems.
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Scratches and Tears.
Rough handling of the wafers during the wafer fabrication process can
scratch the delicate metallization patterns on the wafer. A scratch
that decreases the effective width of a metal line can cause large current
densities in the affected area, leading to hot spots and premature
occurrence of electromigration. Tearing of
the metallization, on the other hand, may occur when the resist is
removed. Metal tearing can also reduce metal line widths and lead to the
same issues as metal scratches.
Inadequate Step Coverage.
A step, just like a stair step, is a feature on the pattern formed as a
lower-level layer meets a higher-level layer on the wafer. The
vertical wall of a step is more difficult to cover with material, and
naturally receives a thinner coating that horizontal surfaces. If an
excessively thin resist layer goes over a step, this resist can fail
during a subsequent etching process, resulting in etching defects. Poor
step coverage can also cause electrical failures, such as breakdowns of
excessively thin oxides between intersecting metal lines during ESD
Sorab K. Ghandhi, VLSI Fabrication Principles, Wiley-Interscience
Lithography / Etch;
Wet Etching; Dry
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