Built-in Self Test,
or BIST, is
technique of designing additional hardware and software
integrated circuits to allow
them to perform self-testing, i.e., testing of their own operation
(functionally, parametrically, or both) using their own circuits,
reducing dependence on an external automated test equipment (ATE).
BIST is a
Design-for-Testability (DFT) technique, because it
makes the electrical testing of a chip easier, faster, more efficient, and less costly.
The concept of BIST is applicable to just about any kind of circuit, so
its implementation can vary as widely as the product diversity that it
caters to. As an example, a common BIST approach for DRAM's
includes the incorporation onto the chip of additional circuits for
pattern generation, timing, mode selection, and go-/no-go diagnostic
drivers for the widespread development of BIST techniques are the
of ATE testing and the growing
of integrated circuits.
It is now common to see complex devices that have functionally diverse
blocks built on different technologies inside them. Such complex devices
testers that possess
special digital and analog testing capabilities. BIST can be used
to perform these special tests with additional on-chip test circuits,
eliminating the need to acquire such high-end testers.
BIST is also the solution
to the testing of critical circuits that have
connections to external pins, such as embedded memories used internally
by the devices. In the near future, even the most advanced tester may no
longer be adequate for the fastest chip, a situation wherein
self-testing may be the best solution for.
of implementing BIST include: 1) lower cost of test, since the need for
external electrical testing using an ATE will be reduced, if not
eliminated; 2) better fault coverage, since special test structures can
be incorporated onto the chips; 3) shorter test times if the BIST can be
designed to test more structures in parallel; 4) easier customer
support; and 5) capability to perform tests outside the production
electrical testing environment. The last advantage mentioned can
actually allow the consumers themselves to test the chips prior to
mounting or even after these are in the application boards.
of implementing BIST include: 1) additional silicon area and fab
processing requirements for the BIST circuits; 2) reduced access times; 3) additional pin (and
possibly bigger package size) requirements, since the BIST circuitry
need a way to interface with the outside world to be effective; and 4)
possible issues with the correctness of BIST results, since the on-chip
testing hardware itself can fail.
that need to be considered when implementing BIST are: 1)
faults to be
covered by the BIST and how these will be tested for; 2) how much
area will be occupied by the BIST circuits; 3) external
excitation requirements of the BIST; 4) test time and effectiveness of
the BIST; 5) flexibility and changeability of the BIST (i.e., can the
BIST be reprogrammed through an on-chip ROM?); 6) how the BIST will
electrical test processes that are already in place.
BIST techniques are
classified in a number of ways, but two common classification of BIST
Logic BIST (LBIST) and the Memory BIST (MBIST).
which is designed for testing random logic, typically employs a
(PRPG) to generate input patterns that are applied to the device's
internal scan chain, and a
input signature register
obtaining the response of the device to these test input patterns.
An incorrect MISR output indicates a defect in the device.
as its name implies, is used specifically for testing memories. It
typically consists of test circuits that apply, read, and compare test
patterns designed to expose defects in the memory device. There
now exists a variety of industry-standard
such as the "March" algorithm, the checkerboard algorithm, and the
varied pattern background algorithm.
also encounter the acronym
which stands for two totally different BIST techniques: the
which is a form of MBIST used for embedded memories, and the
which is a BIST approach for analog circuits.
BIST is fast becoming an
alternative solution to the rising costs of external electrical testing
and increasing complexity of devices. This approach will find
greater deployment in a wider variety of circumstances as more and
better BIST techniques are developed. This does not mean, however,
that BIST will eventually replace external electrical testing
altogether. Still, BIST proponents are optimistic that BIST will someday
mode of testing, instead of being merely an alternative to external ATE
testing as it is today.
Strip Testing; Test Equipment;
JTAG - Scan
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